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tb62777fng/fg toshiba bi-cmos integrated circuit silicon monolithic tb62777fng, TB62777FG 8-channel constant-current led driver of the 3.3-v and 5-v power supply voltage operation tb62777fng TB62777FG weight: ssop16-p-225-0.65b 0.07 g (typ.) ssop16-p-225-1.00a 0.14 g (typ.) the tb62777fng/fg is comprised of constant-current drivers designed for leds and led panel displays. the regulated current sources are designed to provide a constant current, which is adjustable through one external resistor. the tb62777fng/fg incorporates eight channels of shift registers, latches, and gates and constant-current outputs. fabricated using the bi-cmos process, the tb62777fng/fg is capable of high-speed data transfers. the tb62777fng/fg is rohs. features ? power supply voltages: v dd = 3.3 v/5 v ? output drive capability and output count: 50 ma 8 channels ? constant-current output range: 5 to 40 ma ? voltage applied to constant-current output terminals: 0.4 v (min, i out = 5 to 40 ma) ? designed for common-anode leds ? thermal shutdown (tsd) min: 150 ? power on reset (por) ? logical input signal voltage level: 3.3-v and 5-v cmos interfaces (schmitt trigger input) ? maximum output voltage: 25v ? serial data transfer rate: 25 mhz (max) @cascade connection ? operating temperature range: t opr = ? 40 to 85c ? package: ssop16-p-225-0. 65b/ ssop16-p-225-1.00a ? constant-current accuracy output voltage current accuracy between channels current accuracy between ics output current 0.4 v to 4 v 3% 6% 15 ma 2010-03-08 1
tb62777fng/fg 2010-03-08 2 pin assignment (top view) block diagram truth table clock latch enable serial-in out0 out5 out7 serial-out h l dn dn dn ? 5 dn ? 7 no change l l dn + 1 no change no change h l dn + 2 dn + 2 dn ? 3 dn ? 5 no change x h dn + 3 off no change x h dn + 3 off dn 4 note 1: out0 to out7 = on when dn = h; out0 to out7 = off when dn = l. gnd serial-in latch clock out0 out1 out2 out3 vdd r-ext serial-out enable out7 out6 out5 out4 serial-in latch out0 r-ext enable q st d q st d q st d clock out1 out7 d q ck serial-out i-reg 8-bit shift register q0 q1 q7 d0 to d7 d0 tsd vdd gnd por r r r r r
tb62777fng/fg 2010-03-08 3 timing diagram note 1: latches are level-sensitive, not edge-triggered. note 2: the tb62777fng can be used at 3.3 v or 5.0 v. however, the v dd supply voltage must be equal to the input voltage. note 3: serial data is shifted out of serial-out on the falling edge of clock. marks: the latches hold data while the latch terminal is held low. when the latch terminal is high, the latches do not hold data and pass it transparently. when the enable terminal is low, out0 to out7 toggle between on and off according to the data. when the enable terminal is high, out0 to out7 are forced off. serial-in latch clock out0 out1 serial-out enable out7 h l n = 0 1 2 34567 h l h l h l on off on off on off on off h l data applied when n = 0 2out
tb62777fng/fg 2010-03-08 4 terminal description pin no. pin name function 1 gnd gnd terminal 2 serial-in serial data input terminal 3 clock serial clock input terminal 4 latch latch input terminal 5 out0 constant-current output terminal (open collector) 6 out1 constant-current output terminal (open collector) 7 2out constant-current output terminal (open collector) 8 out3 constant-current output terminal (open collector) 9 out4 constant-current output terminal (open collector) 10 out5 constant-current output terminal (open collector) 11 out6 constant-current output terminal (open collector) 12 out7 constant-current output terminal (open collector) 13 enable output enable input terminal all outputs ( out0 to out7 ) are disabled when the enable terminal is driven high, and enabled when it is driven low. 14 serial-out serial data output terminal. serial data is clocked out on the falling edge of clock. 15 r-ext an external resistor is connected between this terminal and ground. out0 to out7 are adjusted to the same current value. 16 v dd power supply terminal equivalent circuits for inputs and outputs clock, serial-in enable latch terminals serial-out terminal out0 to out7 constant-current output terminals v dd enable latch gnd clock serial-in v dd gnd serial-out out0 ~ out7 gnd
tb62777fng/fg 2010-03-08 5 absolute maximum ratings (ta = 25c) characteristics symbol rating unit supply voltage v dd 6.0 v input voltage v in ? 0.3 to v dd + 0.3 (note 1) v output current i out 55 ma/ch output voltage v out ? 0.3 to 25 v power dissipation p d 1.19(fg type) / 1.02(fng type) (notes 2 and 3) w thermal resistance r th (j-a) 105(fg type) / 122(fng type) (note 2) c/w operating temperature range t opr ? 40 to 85 c storage temperature range t stg ? 55 to 150 c maximum junction temperature t j 150 c note 1: however, do not exceed 6.0 v. note 2: when mounted on a pcb (76.2 114.3 1.6 mm; cu = 30%; 35- m-thick; semi-compliant) note 3: power dissipation is reduced by 1/r th (j-a) for each c above 25c ambient. operating ranges (unless otherwise specified, ta = ? 40c to 85c) characteristics symbol test condition min typ. max unit supply voltage v dd ? 3 ? 5.5 v output voltage v out 0 out to 7 out 0.4 ? 4 v i out 0 out to 7 out 5 ? 40 ma/ch i oh serial-out ? ? ? 5 output current i ol serial-out ? ? 5 ma v ih 0.7 v dd ? v dd input voltage v il serial-in/clock/ latch / enable gnd ? 0.3 v dd v clock frequency f clk cascade connection ? ? 25 mhz latch pulse width t wlat (note 2) 20 ? ? clock pulse width t wclk (note 2) 20 ? ? ns i out 20 ma (note 2) 2 ? ? enable pulse width t wena 5 ma i out 20 ma (note 2) 3 ? ? s t setup1 5 ? ? setup time t setup2 5 ? ? t hold1 5 ? ? hold time t hold2 (note 2) 5 ? ? ns maximum clock rise time t r ? ? 5 maximum clock fall time t f single operation (notes 1 and 2) ? ? 5 s note 1: for cascade operation, the clock waveform might become ambiguous, causing the t r and t f values to be large. then it may not be possible to meet the timing requirement for data transfer. please consider the timing carefully. note 2: please see the timing waveform on page 9.
tb62777fng/fg 2010-03-08 6 electrical characteristics (unless otherwise specified, ta = 25c, v dd = 4.5 to 5.5 v) characteristics symbol te s t circuit test condition min typ. max unit output current i out1 5 v out = 0.4 v, r-ext = 1.2 k v dd = 5 v, D 15 D ma output current error between ics i out1 5 v out = 0.4 v, r-ext = 1.2 k all channels on v dd = 5 v, D 3 6 output current error between channels i out2 5 v out = 0.4 v, r-ext = 1.2 k all channels on v dd = 5 v ? 1 3 % output leakage current i oz 5 v out = 25 v ? ? 1 a v ih ? serial-in/clock/ latch / enable 0.7 v dd ? v dd input voltage v il ? serial-in/clock/ latch / enable gnd ? 0.3 v dd v i ih 2 v in = v dd clock/serial-in / latch / enable D D 1 input current i il 3 v in = gnd clock/serial-in/ latch / enable D D ? 1 a v ol 1 i ol = 5.0 ma, v dd = 5 v ? ? 0.3 serial-out output voltage v oh 1 i oh = ? 5.0 ma, v dd = 5 v 4.7 ? ? v changes in constant output current dependent on v dd %/v dd 5 v dd = 3 v to 5.5 v ? 1 2 % i dd (off) 1 4 r-ext = open, v out = 25.0 v ? ? 1 i dd (off) 2 4 r-ext = 1.2 k , v out = 25.0 v, all channels off ? ? 5 supply current i dd (on) 4 r-ext = 1.2 k , v out = 0.4 v, all channels on ? ? 9 ma switching characteristics (unless otherwise specified, ta = 25c, v dd = 4.5 to 5.5v) note 1: t opr = 25c, v dd = v ih = 5 v, v il = 0 v, r ext = 1.2 k , i out = 15 ma , v l = 5.0 v, c l = 10.5 pf (see test circuit 6.) characteristics symbol te s t circuit test condition (note 1) min typ. max unit t plh1 6 clk- outn , latch = ?h?, enable = ?l? ? 20 300 t plh2 6 latch ? outn , enable = ?l? ? 20 300 t plh3 6 enable ? outn , latch = ?h? ? 20 300 t plh 6 clk-serial out 2 10 14 t phl1 6 clk- outn , latch = ?h?, enable = ?l? ? 30 340 t phl2 6 latch ? outn , enable = ?l? ? 70 340 t phl3 6 enable ? outn , latch = ?h? ? 70 340 propagation delay time t phl 6 clk-serial out 2 10 14 output rise time t or 6 10% to 90% points of out0 to out7 voltage waveforms D 20 150 output fall time t of 6 90% to 10% points of out0 to out7 voltage waveforms D 125. 300 ns
tb62777fng/fg 2010-03-08 7 electrical characteristics (unless otherwise specified, ta = 25c, v dd = 3 to 3.6 v) characteristics symbol te s t circuit test condition min typ. max unit output current i out1 5 v out = 0.4 v, r-ext = 1.2 k v dd = 3.3 v D 15 D ma output current error between ics i out1 5 v out = 0.4 v, r-ext = 1.2 k all channels on v dd = 3.3 v D 3 6 % output current error between channels i out2 5 v out = 0.4 v, r-ext = 1.2 k all channels on v dd = 3.3 v ? 1 3 % output leakage current i oz 5 v out = 25 v ? ? 1 a v ih ? serial-in/clock/ latch / enable 0.7 v dd ? v dd input voltage v il ? serial-in/clock/ latch / enable gnd ? 0.3 v dd v i ih 2 v in = vdd clock/serial-in/ latch / enable D D 1 input current i il 3 v in = gnd clock/serial-in/ latch / enable D D ? 1 a v ol 1 i ol = 5.0 ma, v dd = 3.3 v ? ? 0.3 serial-out output voltage v oh 1 i oh = ? 5.0 ma, v dd = 3.3 v 3.0 ? ? v changes in constant output current dependent on v dd %/v dd 5 v dd = 3 v to 5.5 v ? 1 2 % i dd (off) 1 4 r-ext = open, v out = 25.0 v ? ? 1 i dd (off) 2 4 r-ext = 1.2 k , v out = 25.0 v, all channels off ? ? 5 supply current i dd (on) 4 r-ext = 1.2 k , v out = 0.4 v, all channels on ? ? 9 ma switching characteristics (unless otherwise specified, ta = 25c , v dd = 3 to 3.6 v ) note 1: t opr = 25c, v dd = v ih = 3.3 v, v il = 0 v, r ext = 1.2 k , i out = 15 ma , v l = 5.0 v, c l = 10.5 pf (see test circuit 6.) characteristics symbol te s t circuit test condition (note 1) min typ. max unit t plh1 6 clk- outn , latch = ?h?, enable = ?l? ? ? 300 t plh2 6 latch - outn , enable = ?l? ? ? 300 t plh3 6 enable - outn , latch = ?h? ? ? 300 t plh 6 clk-serial out 2 ? 14 t phl1 6 clk- outn , latch = ?h?, enable = ?l? ? ? 340 t phl2 6 latch - outn , enable = ?l? ? ? 340 t phl3 6 enable - outn , latch = ?h? ? ? 340 propagation delay time t phl 6 clk-serial out 2 ? 14 output rise time t or 6 10% to 90% points of out0 to out7 voltage waveforms ? ? 150 output fall time t of 6 90% to 10% points of out0 to out7 voltage waveforms ? ? 300 ns
tb62777fng/fg 2010-03-08 8 test circuits test circuit 1: serial-out output voltage (v oh /v ol ) test circuit 2: input current (i ih ) test circuit 3: input current (i il ) r ext v dd out0 out7 c l = 10.5 pf a a a a v dd = 4.5 to 5.5 v 3 to 3.6v gnd serial-in latch clock enable r-ext serial-out r ext v dd out0 out7 c l = 10.5 pf v in = v dd a a a a v dd = 4.5 to 5.5 v 3 to 3.6v gnd serial-in latch clock enable r-ext serial-out v dd out0 out7 gnd i o = ? 5 ma to 5 ma c l = 10.5 pf v dd = 5 v 3.3v f. g v ih = v dd v il = 0 v t r = t f = 10 ns (10 to 90%) r ext v serial-in latch clock enable r-ext serial-out
tb62777fng/fg 2010-03-08 9 test circuit 4: supply current note: the output terminal is based on the power supply current conditions on page 6 and 7. test circuit 5: output current (i out1 ), output leakage current (i oz ), output current error margin ( i out1 / i out2 ), current variation with v dd (%/v dd ) v dd out0 out7 c l = 10.5 pf f. g a a a v dd = 4.5 to 5.5 v 3 to 3.6v gnd serial-in latch clock enable r-ext serial-out v ih = v dd v il = 0 v t r = t f = 10 ns (10 to 90%) r ext = 1.2 k v out = 0.4 v, 25 v theoretical output current = 1.13 v/r ext 16 out7 c l = 10.5 pf f. g v ih = v dd v il = 0 v t r = t f = 10 ns (10 to 90%) a v dd = 4.5 to 5.5 v 3 to 3.6v gnd serial-in latch clock enable r-ext serial-out out0 r ext = 1.2 k
tb62777fng/fg 2010-03-08 10 test circuit 6: switching characteristics c l i out v dd out0 out7 c l = 10.5 pf f. g v dd = 4.5 to 5.5 v 3 to 3.6v gnd serial-in latch clock enable r-ext serial-out v ih = v dd v il = 0 v t r = t f = 10 ns (10 to 90%) v l = 5 v c l = 10.5 p f r ext = 1.2 k r l =300
tb62777fng/fg 2010-03-08 11 timing waveforms 1. clock, serial-in, serial-out 2. clock, serial-in, latch , enable , outn 3. outn note: timing chart waveforms are presented to describe functions and operations and may be simplified. adequate consideration should be given to timing conditions. t of 10% 90% 10% 90% t or outn off on t wena 50% t hold2 serial-in clock 50% 50% 50% 50% 50% t phl1 / lh1 t phl2 / lh2 t phl3 / lh3 t wlat enable latch outn 50% 50% t setup2 50% t wena t hold1 t plh /t phl t wclk 50% 50% 50% 50% t setup1 serial-in clock serial-out 50% t r 90% 10% 90% 10% t f
tb62777fng/fg output current vs. derati ng (lighting rate) graph pcb conditions: 76.2 114.3 1.6 mm, cu = 30%, 35- m thick, semi-compliant tb62777fng 150 0 1.4 1.2 pd-ta (c) 5 0 t a 100 0.0 0.2 0.4 0.6 0.8 1.0 pd(w) i out ? duty on pcb 100 90 80 70 60 2010-03-08 12 output current vs. external resistor (typ.) the above graphs are presented merely as a guide and do not constitute any guarantee as to the performance or characteristics of the device. each product design shou ld be fully evaluated in a real-world environment. 0 10 20 30 40 50 i out (ma) on pcb all outputs on ta = 85c v dd = 5.0 v v out = 1.0 v 0 20 40 60 80 100 duty ? turn-on rate (%) i out - r ext 0 5 10 15 20 25 30 35 40 45 50 100 1000 10000 r ext ( ) i out ? r ext i out (a) = 1.13 (v) r ext ( )) 16 theoretical value i out (ma) i out (ma) all outputs on ta = 25c v out = 0.7 v
tb62777fng/fg 2010-03-08 13 application circuit 1: general compos ition for static lighting of leds in the following diagram, it is recommended that the led supply voltage (v led ) be equal to or greater than the sum of v f (max) of all leds plus 0.7 v. o0 o1 o2 o5 o6 o7 c.u. serial-in enable latch clock v led serial-out serial-out serial-in enable latch clock o0 o1 o2 o5 o6 o7 tb62777fng/fg tb62777fng/fg r-ext r-ext gnd gnd
tb62777fng/fg 2010-03-08 14 application circuit 2: general compos ition for dynamic lighting of leds in the following diagram, it is recommended that the led supply voltage (v led ) be equal to or greater than the sum of v f (max) of all leds plus 0.7 v. o0 o1 o6 o7 c.u. serial-in enable latch clock v led serial-out serial-out example) td62m8600fg 8 bit multichip pnp transistor array. it is not necessary when lighting statically. serial-in enable latch clock o0 o1 o6 tb62777fng/fg tb62777fng/fg r-ext r-ext gnd gnd o7
tb62777fng/fg package dimensions weight: 0.07 g (typ.) 2010-03-08 15
tb62777fng/fg package dimensions weight: 0.14 g (typ.) 2010-03-08 16
tb62777fng/fg notes on contents 1. block diagrams some of the functional blocks, circ uits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. equivalent circuits the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. timing charts timing charts may be simplified for explanatory purposes. 4. application circuits the application circuits shown in this document ar e provided for reference purposes only. thorough evaluation is required, especially at the mass production design stage. toshiba does not grant any license to any industrial property rights by prov iding these examples of application circuits. 5. test circuits components in the test circuits are used only to obtain and confirm the devi ce characteristics. these components and circuits are not guaranteed to prev ent malfunction or failure from occurring in the application equipment. ic usage considerations notes on handling of ics (1) the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating(s) may cause br eakdown, damage or deterioratio n of the device, and may result in injury by explosion or combustion. (2) use an appropriate power supply fuse to ensure that a large current does not continuously flow in the event of over current and/or ic fa ilure. the ic will fully break down when used under conditions that exceed its absolute maximum rating s, when the wiring is routed improperly or wh en an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow. such a breakdown can lead to smoke or ignition. to minimize the effects of a large curr ent flow in the event of breakdown, fuse capacity, fusing time, insertion circuit location, and other such suitable settings are required. (3) if your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current re sulting from the inrush current at power on or the negative current result ing from the back electromotive force at power off. ic breakdown may cause injury, smoke or ignition. for ics with built-in protection functions, use a stable power su pply with. an unstable power supply may cause the protection function to not operate, causing ic breakdown. ic breakdown may cause injury, smoke or ignition. (4) do not insert devices incorrectly or in the wrong orie ntation. make sure that the positive and negative terminals of power supplies are connected properly. otherwise, the current or power consumption may exceed the absolute maximum rating , and exceeding the rating(s) ma y cause breakdown, damage or deterioration of the device, which may result in inju ry by explosion or combus tion. in addition, do not use any device that has had current applied to it wh ile inserted incorrectly or in the wrong orientation even once. 2010-03-08 17
tb62777fng/fg (5) carefully select power amp, regulator, or other ex ternal components (such as inputs and negative feedback capacitors) and load components (such as speakers). if there is a large amount of leakage current such as input or negative feedback capacitors, the ic output dc voltage will increase. if this output voltage is connected to a speaker with low input withstand voltage, overcurrent or ic failure can ca use smoke or ignition. (the over current can cause smoke or ignition from the ic itself .) in particular, please pay attention when using a bridge tied load (btl) connection type ic that inputs outp ut dc voltage to a speaker directly. points to remember on handling of ics (1) heat dissipation design in using an ic with large current flow such as a power amp, regulator or driver, please design the device so that heat is appropriately dissipated, not to exceed the specified junc tion temperature (tj) at any time or under any condition. these ics generate heat even during normal use. an inadequate ic heat dissipation design can lead to decrease in ic life, deterioration of ic characteristics or ic breakdown. in addition, please de sign the device taking into consideration the effect of ic heat dissipation on peripheral components.. (2) back-emf when a motor rotates in the reverse direction, stops, or slows down abruptly, a current flow back to the motor?s power supply due to the effect of back-emf. if the current sink capability of the power supply is small, the device?s motor power supply and outp ut pins might be exposed to conditions beyond maximum ratings. to avoid this problem, take th e effect of back-emf into consideration in your system design. 2010-03-08 18
tb62777fng/fg about solderability, following conditions were confirmed ? solderability (1) use of sn-37pb solder bath solder bath temperature = 230c dipping time = 5 seconds the number of times = once use of r-type flux (2) use of sn-3.0ag-0 .5cu solder bath solder bath temperature = 245c dipping time = 5 seconds the number of times = once use of r-type flux 2010-03-08 19
tb62777fng/fg 2010-03-08 20 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (colle ctively ?toshiba?), reserve the right to make changes to the in formation in this document, and related hardware, software and systems (collectively ?product?) without notice. ? this document and any information here in may not be reproduced without prior wr itten permission from toshiba. even with toshiba?s written permission, reproduction is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product?s quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malf unction or failure of product could cause loss of human life, b odily injury or damage to property, including da ta loss or corruption. before customers us e the product, create designs including the product, or incorporate the product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and application notes for product and the precautions and conditions set forth in the ?t oshiba semiconductor reliability handbook? and (b) the instructio ns for the application with which the product will be used with or for. customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determinin g the appropriateness of the use of this product in such des ign or applications; (b) evaluating and determining the applicability of any information c ontained in this document, or in charts, dia grams, programs, algorithms, sample application circuits, or any othe r referenced documents; and (c) validating all operating paramete rs for such designs and applications. toshiba assumes no liability for customers? product design or applications. ? product is intended for use in general electronics application s (e.g., computers, personal equipment, office equipment, measur ing equipment, industrial robots and home el ectronics appliances) or for specific applicat ions as expressly stated in this document . product is neither intended nor warranted for use in equipment or systems that require extraordinarily high levels of quality a nd/or reliability and/or a malfunction or failure of which may caus e loss of human life, bodily injury, serious property damage or se rious public impact (?unintended use?). unintended use includes, without limit ation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automo biles, trains, ships and other transportation, traffic signalin g equipment, equipment used to control comb ustions or explosions, safety devices, el evators and escalators, devices related to el ectric power, and equipment used in finance-rela ted fields. do not use product for unintend ed use unless specifically permitted in thi s document. ? do not disassemble, analyze, reverse-engineer, alter, modify , translate or copy product, whether in whole or in part. ? product shall not be used for or incorporated into any produc ts or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations. ? the information contained herein is presented only as guidance for product use. no responsibility is assumed by toshiba for an y infringement of patents or any other intellectual property rights of third parties that may result from the use of product. no license to any intellectual property right is granted by this document, wh ether express or implied, by estoppel or otherwise. ? absent a written signed agreement, except as provid ed in the relevant terms and conditions of sale for product, and to the maximum extent allowable by law, toshiba (1) assumes no liability whatsoever, including without limitation, indirect, co nsequential, special, or incidental damages or loss, including without limitation, loss of profit s, loss of opportunities, business interruption and loss of data, and (2) disclaims any and all express or implied warranties and conditions related to sale, use of product, or information, including warranties or conditions of merchantability, fitness for a particular purpose, accuracy of information, or noninfringement. ? do not use or otherwise make available product or related so ftware or technology for any m ilitary purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technolog y products (mass destruction weapons). product and related soft ware and technology may be controlled under the japanese foreign exchange and foreign trade law and the u.s. export administration regulations. export and re-export of product or related softw are or technology are strictly prohibit ed except in compliance with all applicable export laws and regulations. ? please contact your toshiba sales representative for details as to environmental matters such as the rohs compatibility of pro duct. please use product in compliance with all applicable laws and re gulations that regulate the inclusion or use of controlled subs tances, including without limitation, the eu rohs directive. toshiba a ssumes no liability for damages or losses occurring as a result o f noncompliance with applicable laws and regulations.

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